1. Field of the Invention
The present invention relates to a semiconductor memory device and a latency signal generating method thereof.
2. Description of the Related Art
A conventional semiconductor memory device generates data and a data strobe signal synchronized with a clock signal received from an external source during a read operation. The data strobe signal exhibits states including a preamble state and a strobe state, and the preamble state is generated before the strobe state. Data is not outputted while the preamble state is exhibited. Data is outputted when the strobe state is exhibited. Typically, the preamble state is exhibited during one clock cycle.